EEEE4123 Semester 2 — 2023/24 Level 4 (MEng/MSc/PhD)

HDL for Programmable Devices

Introduces the syntax and professional application of VHDL for FPGA-based digital system design using commercial Xilinx and Mentor Graphics tool chains, covering both combinational and sequential architectures.

75 students
Students
20 credits
Credits
Level 4 (MEng/MSc/PhD)
Level
PGTA
Role